1. Field of the Invention
The present invention relates to an evaluation of wiring patterns of multilayer ceramic substrates.
2. Description of Background Art
FIG. 1 is a perspective view showing a configuration of a conventional ceramic multilayer substrate 50. Ceramic multilayer substrate 50 has the third layer 53, the second layer 52, and the first layer 51 laminated successively from the bottom, and lastly cap 55 is attached. The figure shows the configuration of the top layer (first layer) 51 before cap 55 is attached. The first layer 51 includes the top wiring and chip part 54. The same thing can be said of the second layer 52 and the third layer 53.
FIG. 2 is a cross-sectional view of ceramic multilayer substrate 50 cut in the direction perpendicular to each layer. Wiring 64 of the first layer 51 (FIG. 1), wiring 65 of the second layer 52 (FIG. 1), and inner wiring 66 of the third layer 53 (FIG. 1) are circuit wiring of power supply circuit, RF wiring, connection wiring between circuits, etc., respectively. The power supply circuit of the first layer 51 (FIG. 1) is formed using chip parts of resistance R, capacitance C, impedance L, and others. Electrical connections of wiring of each layer are secured by via-holes (for example, via-hole 68).
At the center of ceramic multilayer substrate 50, one or more holes are provided in advance so that semiconductor element 61 may be assembled. More precisely, since the profile of semiconductor element 61, position of via-holes, and other physical conditions differ layer by layer, specified holes must be provided in advance in assembling ceramic multilayer substrate 50. Consequently, before hardening by firing, wiring is put between ceramic materials of, for example, clay, and the holes at the center section and via-holes are formed. Each ceramic layer thus formed is completed by firing. When each ceramic layer is laminated, semiconductor element 61 arranged at the hole is connected to the specified layer (for example, wiring 65 of the second layer 52 (FIG. 1)) by wire 62.
On a surface exposed to the outside of the third layer 53 (FIG. 1), that is, the surface on the side opposite to cap 55, wiring 67 and terminal 69 are mounted. Grounding wiring 67 for multilayer substrate 50 secures grounding. Terminal 69 is, for example, for outputting electric power to secure electrical connections between ceramic multilayer substrate 50 and the outside.
Because in ceramic multilayer substrate 50, wiring is inspected only from wiring 64 on the uppermost layer, the characteristics of intermediate wiring are unable to be directly confirmed and mutual influences between circuits are unable to be evaluated. The reasons are described as follows. Firstly, in ceramic multilayer substrate 50, it is difficult to bore holes to the intermediate layer hardened after firing and process holes without cutting wiring on intermediate layers. Secondly, because if wiring is inspected from wiring 64 on the uppermost layer where a probe needle is brought in contact with the wiring, measurement errors increase and the S parameter is unable to be measured, evaluation cannot be made unless bonding is made on the special-purpose substrate in the module condition. Furthermore, from wiring 64 on the uppermost layer, only direct current characteristics can be evaluated.